With the design trend in electronic devices is toward lighter, smaller, thinner but more functional devices with performance requirements continuing to increase, device manufacturers increasingly need specialty integrated circuit (IC) solutions for allowing billions of miniature electronic components to be densely packed in a small area. Thus, device manufacturers come up with innovative packaging techniques for embedding electronic components in a substrate while allowing shorter traces between the electronic components and the substrate. In addition, the layout area is increased by the use of built-up technique as the technology advances for achieving lighter, smaller, thinner and more functional high-performance devices.
Generally, most high-end chips are packaged by flip chip (FC) process, especially by a chip scale package (CSP) process, as those high-end chips are primarily being applied in smart phones, tablet computers, network communication devices, and notebook computers, whichever is generally operating under high-frequency and high-speed condition and required to be packed in a thin, small and light-weighted semiconductor package. As for the carrier for packaging, the popular design nowadays includes: small pitches between lines, high density, thin-type design, low manufacture cost, and high electrical characteristic.
Please refer to FIG. 1A to FIG. 1D, which are schematic diagrams showing steps of a transfer molding process for fabricating conventional mold compound substrate structures. Generally, the transfer molding process is performed for forcing a molding compound into a caplet type mold in a side gate injection manner or top gate injection manner so as to form the desired mold compound substrate structures 110 on the metal carrier 100. During the transfer molding process, there can be more than one transfer molding step being enabled, whereas in each single transfer molding step there can only be six separated mold compound substrate structures 110 being formed on the metal carrier 100. Thus, it is required to have four such transfer molding steps being performed sequentially in the transfer molding process, as shown in FIG. 1A to FIG. 1D, so as to achieve all the required mold compound substrate structures 110 on the metal carrier 100.
Please refer to FIG. 2, which is an A-A′ sectional view of a mold compound substrate structure of FIG. 1A. As shown in FIG. 2, the mold compound substrate structure 110, that is formed on a metal carrier 100, comprises: a first wiring layer 120, a first conductive pillar layer 130, a plurality of first molding compound layers 140, a dielectric material layer 150, a second wiring layer 160 and a solder resist layer 170. The first wiring layer 120 is disposed on the metal carrier 100 and the first conductive pillar layer 130 is disposed on the first wiring layer 120 while allowing the plural molding compound layers 140 to be disposed within a specific portion of the first wiring layer 120 and the first conductive pillar layer 130 in a manner that there are gaps 142 formed between any neighboring molding compound layers 140 for separating the plural molding compound layers 140 from each other. In addition, the dielectric material layer 150 is disposed on the plural molding compound layers 140, the second wiring layer 160 is disposed on the first conductive pillar layer 130, the plural molding compound layers 140 and the dielectric material layer 150, and the solder resist layer 170 is disposed on the dielectric material layer 150 and the second wiring layer 160.
However, it is noted that the aforesaid mold compound substrate structures are generally formed on a coreless substrate which is primarily made of a body composed of a plurality of molding compound layer 140 and a dielectric layer 150, while enabling electrical connections to be achieved via plating conductive pillar layer and then being packaged using a Molded Interconnection System (MIS) during the substrate manufacturing process. Since it is already noted that the good rigidity of such molding compound substrate can come with a cost that it is easy to crack, such problem can be solved by the forming of more than one layers of molding compound layers in the coreless substrate, causing the reliability of the molding compound layers to be improved significantly to be used in the packaging of a high-density thin-type laminated structure of fine pitch design.
However, the aforesaid conventional transfer molding process still has the following shortcomings: (1) It is required to have a process for forming an additional dielectric material layer for solving the insufficient binding force issue in the second wiring layer 16, and then a semi-additive process (SAP) can be enabled for producing fine-line products. Nevertheless, the additional process for forming the dielectric material layer 150 not only is going to increase the steps to be performed in the fabrication process, but also is going to increase the production cost. (2) Since it is required to perform four times the transfer molding steps sequentially so as to achieve all the required mold compound substrate structures 110 on the metal carrier 100, the resulting process time is inevitably and comparatively longer. (3) Since it is required to have gaps 142 formed between any neighboring molding compound layers 140 for separating the plural molding compound layers 140 from each other, the production difficulty is increased. (4) With the forming of the gaps 142 between any neighboring molding compound layers 140, the area on the metal carrier 100 that is exposed is increased and thus it is more vulnerable to be contaminated by chemicals used in the posterior processes.